D.Module.21065
ADSP-21065L high-precision floating point DSP board
The D.Module.21065 is a high performance, business card sized, floating-point digital signal processor board. It is designed for embedded standalone applications requiring highest arithmetic precision and maximum flexibility. Processing power can easily be doubled by stacking a Co-Processor module on top of the D.Module.21065. As with all members of the D.Module family, the D.Module.BIOS handles low-level hardware programming and lets you focus on the 'real' signal processing tasks.
Key applications include industrial control systems, robotics, ultrasonic signal processing, and acoustical and vibration analysis. Special care has been taken to facilitate field maintenance and serviceability. The Setup Mode provides straightforward file upload for program and parameter updates via RS232 terminal. It also includes basic debugging capabilities for field diagnostics without requiring special emulation hardware.
The modular, self-stacking concept facilitates building complete signal processing systems. Excellent system adaptability is provided by the integration of reconfigurable logic: 16 I/O signals are user-programmable and can be configured to a variety of interfaces ranging from bit-programmable I/O to SPI™, quadrature encoder interfaces, and double-buffered parallel ports - even surpassing the versatility of most microcontrollers.
The ADSP-21065L Sharc® DSP is an exellent choice for demanding algorithms. It's high precision floating point engine is supported by a sophisticated DMA controller which handles all data acquisition and memory transfer tasks in background. Multiple arithmetic exception interrupts lay out the basis for fail-safe algorithms. The internal memory is comprised of a dual-ported architecture to avoid access conflicts between CPU core and DMA transfers. A dual-processor system efficiently doubles the processing power. Both DSPs share the on-board ressources (memory, peripherals, and external bus). Various options for inter-processor communications exist: shared memory, message queues, and inter-processor DMA are supported.
| Product Features | ||
|---|---|---|
| DSP | ADSP-21065L | 66 MHz, 32/40Bit IEEE floating point, 32Bit fixed point, DMA |
| Memory | DSP-internal | 68 Kbyte |
| SRAM | 64K x 32 bit | |
| SDRAM | 4M x 32 bit, 66 MHz operation | |
| Flash | 512 Kbyte, 8-bit wide, sector architecture | |
| UART | 1 | max. 230.4 Kbaud RS232, 500 Kbaud RS422/485, 32 byte transmit and receive FIFOs, DMA support hardware and software auto flow-control RS232, optional RS422/485 |
| External Bus Interface | 32-bit data 8 M address space |
two pre-decoded memory areas, programmable and external wait states |
| Timer | 2 | 32 bit |
| Serial Ports | 2 | each port has two receivers and transmitters, up to 33 Mbit/s throughput |
| GPIO | 16 | XC3032XL in-system programmable CPLD, 32 macrocells, in, out or bidirectional |
| 12 | DSP-Flags, in or out | |
| Miscellaneous | Watchdog JTAG Emulation Interface |
|
| Software | D.Module.BIOS | initialization and programming algorithms for all on board resources |
| Setup Utility | RS232-based field maintenance tool for program and data uploads, User-CPLD reprogramming, diagnostics | |
| Power Supply | 3.3V | single supply |
| Mechanics | 85 x 59 x 15 mm | self-stacking design 2.54 mm pitch through-hole connectors |
| RoHS conformity | yes | |
back to top| Data Sheets and Application Notes | |
|---|---|
| tdd21065.pdf | 
Technical Data Sheet |
| ansys.pdf |
Application Note System Design |
| anspi.pdf |
Application Note SPI Interface in User-CPLD |
| User's Guide, Support Software, Updates | available for registered customers |
| Development Tools | |
|---|---|
| DS.21065 | D.Module.21065 Development Base Package including Support Software, User's Guide, Base Board, Power-Supply, and Cables |
| VisualDSP++® | Analog Devices VisualDSP++ integrated software development and debugging environment |
| ADDS-ICE | JTAG in-circuit emulator, various models for USB and PCI |
| Peripheral Modules | |
|---|---|
| D.Module.Peripherals | Data Acquisition, Networking, Communications, I/O |
| Ordering Information | |
|---|---|
| D.Module.21065-66-S0-D0 | standard module |
| D.Module.21065-66-D0 | OEM option without SDRAM |
| D.Module.21065-66-Co | Co-Processor Module |
| -422 | RS422/485 UART line interface |
| DS.21065 | development base package |
| VDSP-SHARC-PC-FULL | VisualDSP++ integrated development environment |
| ADDS-USB-ICE | USB1.1 JTAG in-circuit emulator |
| ADDS-HPUSB-ICE | high performance USB2.0 JTAG in-circuit emulator |
| ADDS-HPPCI-ICE | high performance PCI JTAG in-circuit emulator |
| Please contact us or our international resellers for price, delivery, and volume discount information | |
| © D.SignT 1998-2009 | comments: webmaster@dsignt.de | Impressum / Imprint | last change: 2009-07-13 |