DSP-Board D.Module2.C6657
The D.Module2.C6657 is based on the Texas Instruments Keystone dual-core processor TMS320C6657. The Keystone multicore DSPs are characterized by huge computational power and fast serial interfaces.
Key Features
- TMS320C6657 dual-core DSP
- Gbit Ethernet, PCIe
- 512 Mbytes RAM
- high throughput parallel and serial peripheral interfaces
- I2C, SPI, UART, USB, and GPIO
- stand-alone operation
Applications
The D.Module2.C6657 is perfectly suitable for radar applications, nondestructive material inspection, machine vision and software defined radio (SDR). An optional FPGA for data preprocessing is easily interfaced through Serial Rapid IO (SRIO), PCI express (PCIe) or via the fast Universal Parallel Port (uPP). Gigabit Ethernet enables network integration for control, remote maintenance and data streaming.
| DSP | TMS320C6657 | dual-core 1.25 GHz fixed- and floating-point, up to 40 GMAC / 20 GFLOP per core |
| Memory | DSP-internal | 32K bytes data cache, 32K bytes program cache per core, 1M byte direct mapped or level-2 cache per core, 1M byte shared RAM |
| DDR3 | 512M bytes, DDR3-1333, 32-bit wide | |
| Flash | 8M bytes NOR (SPI interface, sector architecture), 64M bytes SLC NAND | |
| Ethernet | 1000Base-T, 100Base-Tx, 10Base-T | onboard PHY and magnetics, 1000Base-Fx Fiber support with external transceiver |
| USB | 1.1 | 12 Mbit/s |
| UART | RS232, RS422, RS485 | transmit and receive Fifo, DMA support, RS232: max 460,8K baud, automatic hardware flow-control, RS422/485: max. 20M baud |
| PCIe | 2 lanes | Gen. 2, up to 5 GBaud per lane |
| SRIO | 2 lanes | SRIO 2.1, up to 5 GBaud per lane |
| SPI | 1 | max. 50 Mbps, master and slave mode |
| I2C | 1 | max. 400 kbps, 7 and 10 bit addressing modes, master and slave mode |
| McBSP | 2 | independent receivers and transmitters, max. 50 Mbps throughput |
| Timer | 8 | 2 x 32/64 bit with external I/O, 6 x 32/64 bit with internal clocking |
| GPIO | 16 | bit-wise programmable, input or output (in UPP Mode only 8 GPIO signals are available) |
| External Bus Interface | EMIF | asynchronous transfers, 16 bit data bus, 20 address lines, 2 pre-decoded chip selects, configurable timing *) |
| UPP | synchronous mode, 2 ports, 16- or 8-bit wide, max. clock: 75MHz *) | |
| *) EMIF and UPP are exclusive modes and cannot be used simultaneously | ||
| Real-Time Clock | 1 | provision for external buffer power supply |
| System Supervisor | watchdog, voltage and temperature, optional fan control and tacho supervisor | |
| Emulation Interface | JTAG | |
| I/O Level | LVTTL / LVCMOS | all signals except ETH, PCIe and SRIO: high level min. 2V, max. 3.5V, low level min. -0.2V, max. 0.8V, output drive: external bus interface:± 12 mA, all others ± 4 mA |
| Power Supply | 3.3V | single supply, 2A typ., 3A peak |
| Firmware | D.Module2.BIOS | bootloader, board initialization, board configuration, flash memory programming, UART and USB I/O |
| Setup Utility | program and data file uploads to the flash memory via USB or UART | |
| Config File | user- configurable text file with program and initialization parameters | |
| Temperature Range | 0 – 55°C, 0 – 70°C with forced cooling | |
| Connectors | BUS1, BUS2, COM, EXP | Molex 71436-2164 |
| PCIe / SRIO | Molex 46556-1145 | |
| JTAG | 14-pin, 2.54mm pitch | |
| Mechanics | 86.8 x 58.4 mm, overall height including heatsink: 33mm | |
| ROHS | compliant |
| D.Module2.C6657 | standard module |
| D.Module2.C6657i | Industrial temperature range module -40..+85°C (forced cooling) -40..+65°C (heatsink) |
| DS.TCPIP-DM6657 | Ethernet Development Support Package for D.Module2.C6657 |
| DK.C6657 | C6657 development kit including D.Module2.C6657, XDS200 JTAG in-circuit emulator, D2.Base.P base board, power supply, RS232 and USB cable, support software, user's guide, and free support via Email or phone |
| DK.C6657-FMC | C6657 and FPGA development kit including D.Module2.C6657, D.Module2.6SLX45T, XDS200 JTAG in-circuit emulator, D2.Base-FMC base board, power supply, USB cable, DSP support software, FPGA interface examples in VHDL, user's guides, and free support via Email or phone |
The D.Module2.C6657 may be used as an alternative to other members of the Texas Instruments C66x Keystone processor family. The following resource compares the D.Module2.C6657 features with other Keystone processors.
Emulators
Compiler
Prototyping Boards
TCP/IP Stack