D.Module2.DM642
not recommended for new designs - please consider the D.Module2.C6657
The D.Module2.DM642 is based on the Texas Instruments DaVinci processor TMS320DM642. DaVinci DSPs are optimized for video and image processing.
Key Features
- TMS320DM642 fixed point DSP
- 100MBit Ethernet, USB 2.0
- 64 Mbytes RAM
- Three high-speed video ports
- 2xUART, I2C, GPIO
- stand-alone operation
Applications
The D.Module2.DM642 is ideally suited for image processing and machine vision in such areas as optical inspection, sorting plants, robotics and biometric access control. Specialized video ports simplify the camera interface and are equally well suited to stream pre-processed image data from an FPGA. The Ethernet port enables remote configuration and maintenance as well as integration into the production infrastructure.
DSP | TMS320DM642 | 720 MHz fixed-point DSP, 5760 MMACS peak performance |
Memory | DSP-internal | 16K bytes data cache, 16K bytes program cache, 256K bytes direct mapped or level-2 cache |
SDRAM | 64M bytes, 133 MHz operation, 64-bit wide, 1G bytes/s peak throughput | |
Flash | 8M bytes NOR, sector architecture | |
Video Ports | 3 | built-in capture / display buffers, up to 80 MHz clock, VP0: 12-bit, VP1: 10-bit, VP2: 20-bit |
Ethernet | 100Base-Tx, 10Base-T | onboard PHY and magnetics |
USB | 1 | USB2.0 OTG (480 Mbit/s) |
UART | 2 | transmit and receive Fifo, DMA support, automatic hardware- and software flow control, Port 1: RS232: max 460,8K baud, Port 2: RS422/485: max. 3M baud |
I2C | 1 | max. 400 kbps, 7 and 10 bit addressing modes, master and slave mode |
McBSP | 2 | independent receivers and transmitters, max. 150 Mbps throughput |
Timer | 3 | 2 x 32-bit external I/O, 1 x 32-bit internal clock |
GPIO | 16 | bit-wise programmable, input or output |
External Bus Interface | EMIF | synchronous and asynchronous transfers, 32-bit data bus, 20 address lines, 2 pre-decoded chip selects, configurable timings and bus clocks |
PWM | 3 | 16-Bit Time-Base Counter, 6 Single Edge, 6 Dual Edge Symmetric or 3 Dual Edge Asymmetric Outputs, Dead-Band, PWM Chopping, Trip Zone |
System Supervisor | voltage and watchdog | |
Emulation Interface | JTAG | |
I/O Level | LVTTL / LVCMOS | LVTTL / LVCMOS","all signals except ETH and USB: high level min. 2V, max. 3.5V, low level min. -0.2V, max. 0.8V, output drive: external bus interface:± 24 mA, all others ± 8 mA |
Power Supply | 3.3V | single supply |
Firmware | D.Module2.BIOS | bootloader, board initialization, board configuration, flash memory programming, UART and USB I/O |
Setup Utility | program and data file uploads to the flash memory via USB or UART | |
Config File | user- configurable text file with program and initialization parameters | |
Temperature Range | 0 – 70°C | |
Connectors | BUS1, BUS2, COM, EXP | Molex 71436-2164 |
JTAG | 14-pin, 2.54mm pitch | |
Mechanics | 86.8 x 58.4 mm, overall height: 16mm | |
ROHS | compliant |
D.Module2.DM642 | standard module |
DK.DM642 | DM642 development kit including D.Module2.DM642, XDS100 JTAG in-circuit emulator, D2.Base.P base board, power supply, RS232 and USB cable, support software, user's guide, and free support via Email or phone |
DS.TCP/IP-DM642 | Ethernet software development kit including libraries, sample programs, documentation, and evaluation license for the D.SignT TCP/IP stack |
The D.Module2.DM642 may be used as an alternative to other members of the Texas Instruments DM64x DaVinci processor family. The following resource compares the D.Module2.DM642 features with other DaVinci devices.
Emulatoren
Compiler
Prototyping Boards