D.Module.BIOS

dm2dm642.h

The D.Module.BIOS is an application programming interface for all on board resources. It encapsulates the hardware dependencies and provides functions for

  • Module initialisation
  • UART initialisation , send and receive functions
  • Flash Memory programming support: identify device, erase a sector, program
  • Module configuration: set and clear bits and bit- fields in the module configuration register
  • Miscellaneous functions: install interrupt handler, access to the DSP's registers from a C environment, bootload and delay.

These functions are identical on all D.Modules and help to maintain program portability throughout the D.Module family. The BIOS is written in hand-coded Assembler language to achieve optimum performance.

/***********************************************************************
dm2dm642.h - Header File for D.Module2.DM642
author A.Klemenz
company D.SignT
revision 1.5
date 2014-11-06
hardware D.Module2.DM642 Rev. 1.0
compiler CCS 3.x
history 1.0 intial release 2006-09-21 by AK
1.1 2006-10-19 by AK:
- modified DM2_flashIhexUpload to additionally pass a
handle to the callback function (allows to distinguish
multiple sources)
- fixed a bug in DM2_uart_ReadStr
(timeout not working properly)
- modified DM2_init to additionally call
DM2_usbClearEndpointDescriptors
1.2 2008-03-31 by AK:
- Flash functions changed to deal with write buffer
length of 1
1.3 2008-06-20 by CH:
- added support to disable UART output in Setup
- missing nop 3 in DM2_uartWriteStr and DM2_uartWriteBlock
1.4 2009-03-06 by AK:
- added support for more Flash Memories
- bugfix in DM2_uartReadStr (sporadic LF)
1.5 bugfix in ihex_upload 2014-11-06 by CH
- erased_sector table not initialized correctly
- address calculation for sectors > 24 not correct
***********************************************************************/
#ifndef _DM2_DM642_
#define _DM2_DM642_
#include <stdlib.h>
/***********************************************************************
defines for CSL (must be defined before including csl.h)
***********************************************************************/
#define CHIP_DM642
/***********************************************************************
typedefs for DM2 BIOS functions
***********************************************************************/
typedef void * T_Handle;
// DM2_uartConfig() parameter structure
typedef struct
{
int baud; // 110..uart_mclk/16
unsigned char databits; // 5,6,7,8
char parity; // 'N','O','E','0','1'
unsigned char stopbits; // 1 or 2
char handshake; // 'N','X','R'
char Xon; // typ. 0x11
char Xoff; // typ. 0x13
} T_DM2_uartConfigStruct;
// DM2_usbAddEndpointDescriptor() parameter sturcture
typedef struct
{
unsigned char endpoint; // endpoint (1..7), bit7 = direction (1:IN, 0:OUT)
unsigned char attrib; // type (1:isochron, 2:bulk, 3:interrupt) incl.
// additional 2.0 isochronous attributes
unsigned short fs_size; // max. packetsize in bytes in fullspeed mode
unsigned short hs_size; // max. packetsize in bytes in highspeed mode
// including transactions per microframe for
// isochronous and interrupt endpoints
unsigned char fs_poll; // polling intervall fullspeed mode
unsigned char hs_poll; // polling intervall highspeed mode
unsigned char dblbuf; // 1 if double-buffered
} T_DM2_usbEndpoint;
// USB string table structure
typedef struct
{
int user_strings; // number of user-defined strings
short *language; // index 0
short *user_iManufacturer; // index 1
short *user_iProduct; // index 2
short *user_iSerialNumber; // index 3
short *user_iConfiguration; // index 4
short *user_iInterface; // index 5
} T_DM2_usbStringtab;
/***********************************************************************
DM2 BIOS Function prototypes
***********************************************************************/
#ifdef __cplusplus
extern "C"
{
#endif /* __cplusplus */
extern far void DM2_init (void);
extern far void DM2_bootload (void *src);
extern far void DM2_dspConfig (unsigned char config);
extern far unsigned char DM2_dspGetConfig ( void);
extern far unsigned int DM2_dspGetClock ( void);
extern far void DM2_busConfig (unsigned char config);
extern far unsigned char DM2_hwRev (void);
extern far unsigned char DM2_swRev (void);
extern far void DM2_watchdogEnable (void);
extern far void DM2_watchdogTrigger(void);
extern far void DM2_delay(unsigned short ms);
extern far void DM2_prgioConfig(unsigned char dirmask);
extern far void DM2_prgioWrite(unsigned char data, int operation);
extern far unsigned char DM2_prgioRead(void);
extern far void DM2_intMap (int event, int dsp_int);
extern far void DM2_muxintMap (int event);
extern far unsigned char DM2_muxintRead (void);
extern far void DM2_muxintClear (int event);
extern far void DM2_gpioMap (int signal, int gpiopin);
extern far void DM2_phyReset(void);
extern far unsigned char DM2_phyGetStatus(void);
extern far T_Handle DM2_uartOpen (int device);
extern far int DM2_uartClose (T_Handle h_uart);
extern far void DM2_uartConfig (T_Handle h_uart, T_DM2_uartConfigStruct *config);
extern far int DM2_uartWrite (T_Handle h_uart, char c);
extern far int DM2_uartWriteStr (T_Handle h_uart, char *src, unsigned int timeout);
extern far int DM2_uartWriteBlock (T_Handle h_uart, void *src, size_t count, unsigned int timeout);
extern far int DM2_uartRead (T_Handle h_uart, char *data);
extern far char *DM2_uartReadStr (T_Handle h_uart, char *dst, size_t maxcount, unsigned int timeout, int echo);
extern far unsigned int DM2_uartReadBlock (T_Handle h_uart, void *dst, size_t maxcount, unsigned int timeout, int stopchar);
extern far void DM2_uartTxen (T_Handle h_uart, int enable);
extern far void DM2_uartReset (void);
extern far void DM2_uartEnableInt (T_Handle h_uart, int ier);
extern far unsigned char DM2_uartReadReg (T_Handle h_uart, int reg);
extern far void DM2_uartWriteReg (T_Handle h_uart, int reg, char data);
extern far void DM2_usbReset (void);
extern far unsigned int DM2_usbOpen (int forcefullspeed);
extern far void DM2_usbClose (void);
extern far int DM2_usbIntService (void);
extern far void DM2_usbIntAck (int mask);
extern far void DM2_usbSendZeroPacket (int endpoint);
extern far void DM2_usbRegisterCallback (void(* callback)(int hs, int configured));
extern far void DM2_usbRegisterStringtab (T_DM2_usbStringtab stringtable);
extern far void DM2_usbRegisterCtrltxhandler (void (*ctrltxfunc) (void));
extern far void DM2_usbRegisterStandardrequestFunc (int, void (*stdrequestfunc) (void));
extern far void DM2_usbRegisterStandardrequestFunctab (void *functab);
extern far void DM2_usbRegisterClassrequestFunctab (void *functab);
extern far void DM2_usbRegisterVendorrequestFunctab (void *functab);
extern far int DM2_usbAddEndpointDescriptor (T_DM2_usbEndpoint *ep);
extern far void DM2_usbClearEndpointDescriptors (void);
extern far void DM2_usbCtrltxHandshake (void);
extern far void DM2_usbStallControl (void);
extern far void DM2_usbSetEpconfig (int ep, int dir, int size, int type);
extern far unsigned int DM2_usbReadReg (int reg, int width);
extern far void DM2_usbWriteReg (int reg, int data, int width);
extern far size_t DM2_usbReadProlog (int endpoint);
extern far size_t DM2_usbWriteProlog (int endpoint, size_t cnt);
extern far size_t DM2_usbReadBlock (void *dst, int endpoint);
extern far size_t DM2_usbWriteBlock (int endpoint, void *src, size_t cnt);
extern far char *DM2_usbSetupToken;
extern far size_t DM2_flashOpen(void);
extern far void DM2_flashSetProtectedsize (size_t protectedsize);
extern far char *DM2_flashGetCfi (char *dst);
extern far int DM2_flashSectorerase (void *dst);
extern far int DM2_flashWrite (void *dst, char data);
extern far char DM2_flashRead (void *src);
extern far int DM2_flashWriteBlock (void *dst, char *src, size_t count);
extern far char *DM2_flashReadBlock (char *dst, void *src, size_t count);
extern far int DM2_flashIhexUpload (char *(*getline_callback)(T_Handle), T_Handle devhandle);
#ifdef __cplusplus
}
#endif /* __cplusplus */
/***********************************************************************
defines for UART
***********************************************************************/
#define DM2_UART_BASEADDR(dev) (0x90180000+dev*0x10)
#define DM2_UART_RXREGADDR(dev) (DM2_UART_BASEADDR(dev)) // use for DMA transfers
#define DM2_UART_TXREGADDR(dev) (DM2_UART_BASEADDR(dev)) // use for DMA transfers
#define DM2_UART_RXREG(dev) *(volatile char*)(DM2_UART_BASEADDR(dev)) // use for direct CPU access
#define DM2_UART_TXREG(dev) *(volatile char*)(DM2_UART_BASEADDR(dev)) // use for direct CPU access
#define DM2_UART0 0
#define DM2_UART1 1
#define DM2_UART_NOTIMEOUT 0
/***********************************************************************
parameter for DM2_uartEnableInt
***********************************************************************/
#define DM2_UART_RXINT 0x01 // receiver data available interrupt
#define DM2_UART_TXINT 0x02 // tansmitter empty interrupt
#define DM2_UART_RXERRINT 0x04 // rceiver line status error interrupt
#define DM2_UART_MSINT 0x08 // modem status change interrupt
#define DM2_UART_SLEEP 0x10 // enter sleep mode
#define DM2_UART_XOFFINT 0x20 // Xoff interrupt
#define DM2_UART_RTSINT 0x40 // RTS interrupt
#define DM2_UART_CTSINT 0x80 // CTS interrupt
/***********************************************************************
parameter for DM2_uartWriteReg and DM2_uartReadReg
***********************************************************************/
#define DM2_UART_RHR 0x00 // receive register, write only
#define DM2_UART_THR 0x00 // tansmit register, read only
#define DM2_UART_IER 0x01 // interrupt enable register
#define DM2_UART_IIR 0x02 // interrupt identification register, read only
#define DM2_UART_FCR 0x02 // fifo control register, write only
#define DM2_UART_LCR 0x03 // line control register
#define DM2_UART_MCR 0x04 // modem control register
#define DM2_UART_LSR 0x05 // line status register
#define DM2_UART_MSR 0x06 // modem status register
#define DM2_UART_SPR 0x07 // scratchpad register - not accessible after DM2_uartConfig()
// the following registers are accessible when LCR[7] = 1
#define DM2_UART_DLL 0x00 // baud rate divisor low byte
#define DM2_UART_DLH 0x01 // baud rate divisor high byte
// the following registers are accessible when LCR = 0xBF
#define DM2_UART_EFR 0x02 // enhanced feature register
#define DM2_UART_XON1 0x04 // Xon character 1
#define DM2_UART_XON2 0x05 // Xon character 2
#define DM2_UART_XOFF1 0x06 // Xoff character 1
#define DM2_UART_XOFF2 0x07 // Xoff character 2
// this register is accessible when MCR[2] = 1, default configuration after DM2_uartConfig()
#define DM2_UART_FRR 0x07 // Fifo Ready Register
/***********************************************************************
defines for UART Interrupt Enable Register
***********************************************************************/
#define DM2_UART_IER_RX 0x01 // receiver data avaialble and time-out
#define DM2_UART_IER_TX 0x02 // transmitter ready
#define DM2_UART_IER_RXERR 0x04 // receiver line status error
#define DM2_UART_IER_MODEM 0x08 // modem status change
#define DM2_UART_IER_SLEEP 0x10 // enter sleep mode
#define DM2_UART_IER_XOFF 0x20 // Xoff or special character
#define DM2_UART_IER_RTS 0x40 // RTS change
#define DM2_UART_IER_CTS 0x80 // CTS change
/***********************************************************************
defines for UART Interrupt Identification Register
***********************************************************************/
#define DM2_UART_IIR_MASK 0x3F // mask to identify interrupt source
#define DM2_UART_IIR_MODEM 0x00 // modem status change
#define DM2_UART_IIR_NOINT 0x01 // no more interrupts pending
#define DM2_UART_IIR_TX 0x02 // transmitter ready
#define DM2_UART_IIR_RX 0x04 // receiver data available
#define DM2_UART_IIR_RXERR 0x06 // receiver line status error
#define DM2_UART_IIR_RXTIME 0x0C // receiver time-out
#define DM2_UART_IIR_XOFF 0x10 // Xoff or special character received
#define DM2_UART_IIR_RTSCTS 0x20 // RTS or CTS change of state
/***********************************************************************
defines for USB
***********************************************************************/
#define DM2_USB_BASEADDR 0x90100000
#define DM2_USB_DATAPORT_ADDR (DM2_USB_BASEADDR + 0x40) // use for DMA transfers
#define DM2_USB_INTEVT_EP1RX 0x00001000 // EP1 OUT event
#define DM2_USB_INTEVT_EP1TX 0x00002000 // EP1 IN event
#define DM2_USB_INTEVT_EP2RX 0x00004000 // ...
#define DM2_USB_INTEVT_EP2TX 0x00008000
#define DM2_USB_INTEVT_EP3RX 0x00010000
#define DM2_USB_INTEVT_EP3TX 0x00020000
#define DM2_USB_INTEVT_EP4RX 0x00040000
#define DM2_USB_INTEVT_EP4TX 0x00080000
#define DM2_USB_INTEVT_EP5RX 0x00100000
#define DM2_USB_INTEVT_EP5TX 0x00200000
#define DM2_USB_INTEVT_EP6RX 0x00400000
#define DM2_USB_INTEVT_EP6TX 0x00800000
#define DM2_USB_INTEVT_EP7RX 0x01000000
#define DM2_USB_INTEVT_EP7TX 0x02000000
/***********************************************************************
defines for Flash
macro DM2_FLASH can be used as an alternative to DM2_FlashRead()
function. Note to set the Flash Memory bank with macro DM2_FLASHBANK
prior to DM2_FLASH
***********************************************************************/
#define DM2_FLASH_BASEADDR 0x90000000
#define DM2_FLASH_CTRLREGADDR 0x901C000E
#define DM2_FLASH(addr) (*(volatile char*) (DM2_FLASH_BASEADDR + 2*addr))
#define DM2_FLASHBANK(addr) *(volatile unsigned char*) DM2_FLASH_CTRLREGADDR = (unsigned char)((addr)>>19)
/***********************************************************************
defines for DM2_dspConfig() and DM2_dspReadConfig() functions
***********************************************************************/
#define DM2_DSP_BUS83 0x00 // 83.3 MHz EMIF clock
#define DM2_DSP_BUS100 0x01 // 100 MHz EMIF clock
#define DM2_DSP_BUS125 0x02 // 125 MHz EMIF clock
#define DM2_DSP_BUS133 0x03 // 133 MHz EMIF clock
#define DM2_DSP_DSP480 0x00 // 480 MHz core clock
#define DM2_DSP_DSP600 0x04 // 600 MHz core clock
#define DM2_DSP_DSP720 0x08 // 720 MHz core clock
#define DM2_DSP_MACEN 0x10 // enable ETH MAC
#define DM2_DSP_BIGENDIAN 0x20 // big endian format
#define DM2_DSP_CONFIGURED 0x40 // sticky marker for DSP configuration
// cleared only by hardware reset / power-up
/***********************************************************************
Interrupt Events for DM2_intMap() function
***********************************************************************/
#define DM2_INT_NONE 0
#define DM2_INT_INT0 1
#define DM2_INT_INT1 2
#define DM2_INT_INT2 3
#define DM2_INT_USBCPU 4
#define DM2_INT_USBDMA 5
#define DM2_INT_PRGIO 6
#define DM2_INT_UART0 8
#define DM2_INT_UART1 9
#define DM2_INT_UART0TXDMA 10
#define DM2_INT_UART1TXDMA 11
#define DM2_INT_UART0RXDMA 12
#define DM2_INT_UART1RXDMA 13
#define DM2_INT_ETH 14
#define DM2_INT_MUXINT 15
/***********************************************************************
MUXINT events for functions
DM2_muxintMap()
DM2_muxintRead()
DM2_muxintClear()
***********************************************************************/
#define DM2_MUXINT_NONE 0
#define DM2_MUXINT_USBCPU 0x08
#define DM2_MUXINT_PRGIO 0x10
#define DM2_MUXINT_PHY 0x20
#define DM2_MUXINT_UART0 0x40
#define DM2_MUXINT_UART1 0x80
/***********************************************************************
GPIO signals for DM2_gpioMap() function
***********************************************************************/
#define DM2_GPIO_DSPGPIOIN 0
#define DM2_GPIO_TIMER0IN 2
#define DM2_GPIO_TIMER1IN 4
#define DM2_GPIO_DSPGPIOOUT 8
#define DM2_GPIO_TIMER0OUT 10
#define DM2_GPIO_TIMER1OUT 12
/***********************************************************************
logical operations for DM2_prgioWrite() function
***********************************************************************/
#define DM2_PRGIO_WRITE 0
#define DM2_PRGIO_SET 1
#define DM2_PRGIO_CLEAR 2
#define DM2_PRGIO_TOGGLE 3
/***********************************************************************
defines for DM2_busConfig() function
***********************************************************************/
#define DM2_BUS_SYNC 0x01 // synchronous bus interface
#define DM2_BUS_PDT 0x02 // enable PDT transfers (sync mode only)
#define DM2_BUS_READREG 0x04 // reads are registered (sync mode only)
#define DM2_BUS_RESET 0x80 // assert RESETOUT_N pin
/***********************************************************************
defines for DM2_phyGetStatus() function
***********************************************************************/
#define DM2_PHY_RESET 0x80
#define DM2_PHY_MDINT 0x02
#define DM2_PHY_LED3 0x01
/***********************************************************************
BIOS function call addresses
***********************************************************************/
/***********************************************************************
BIOS function call addresses
***********************************************************************/
asm ("_DM2_bootload .set 000002ech ");
asm ("_DM2_busConfig .set 80001e58h ");
asm ("_DM2_delay .set 80001c8ch ");
asm ("_DM2_dspConfig .set 80001de4h ");
asm ("_DM2_dspGetClock .set 80001e18h ");
asm ("_DM2_dspGetConfig .set 80001e04h ");
asm ("_DM2_flashGetCfi .set 80000ef8h ");
asm ("_DM2_flashIhexUpload .set 80001300h ");
asm ("_DM2_flashOpen .set 80000e40h ");
asm ("_DM2_flashRead .set 80000f98h ");
asm ("_DM2_flashReadBlock .set 800012a4h ");
asm ("_DM2_flashSectorerase .set 80001084h ");
asm ("_DM2_flashSetProtectedSize .set 80000ee4h ");
asm ("_DM2_flashWrite .set 80000fd0h ");
asm ("_DM2_flashWriteBlock .set 80001110h ");
asm ("_DM2_gpioMap .set 80001db0h ");
asm ("_DM2_hwRev .set 80001eb0h ");
asm ("_DM2_init .set 80001c00h ");
asm ("_DM2_intMap .set 80001d40h ");
asm ("_DM2_muxintClear .set 80001d9ch ");
asm ("_DM2_muxintMap .set 80001d74h ");
asm ("_DM2_muxintRead .set 80001d88h ");
asm ("_DM2_phyGetStatus .set 80001e9ch ");
asm ("_DM2_phyReset .set 80001e6ch ");
asm ("_DM2_prgioConfig .set 80001cd8h ");
asm ("_DM2_prgioRead .set 80001d2ch ");
asm ("_DM2_prgioWrite .set 80001cech ");
asm ("_DM2_swRev .set 80001ed4h ");
asm ("_DM2_uartClose .set 800016d0h ");
asm ("_DM2_uartConfig .set 80001730h ");
asm ("_DM2_uartEnableInt .set 80001bbch ");
asm ("_DM2_uartOpen .set 80001660h ");
asm ("_DM2_uartRead .set 800019f8h ");
asm ("_DM2_uartReadBlock .set 80001ae8h ");
asm ("_DM2_uartReadReg .set 80001bc8h ");
asm ("_DM2_uartReadStr .set 80001a20h ");
asm ("_DM2_uartReset .set 80001b48h ");
asm ("_DM2_uartTxen .set 80001b84h ");
asm ("_DM2_uartWrite .set 800018a0h ");
asm ("_DM2_uartWriteBlock .set 80001960h ");
asm ("_DM2_uartWriteReg .set 80001bdch ");
asm ("_DM2_uartWriteStr .set 800018c0h ");
asm ("_DM2_usbAddEndpointDescriptor .set 80000a60h ");
asm ("_DM2_usbClearEndpointDescriptors .set 80000b44h ");
asm ("_DM2_usbClose .set 80000108h ");
asm ("_DM2_usbCtrltxHandshake .set 800003cch ");
asm ("_DM2_usbIntAck .set 80000ba8h ");
asm ("_DM2_usbIntService .set 80000174h ");
asm ("_DM2_usbOpen .set 80000000h ");
asm ("_DM2_usbReadBlock .set 80000d0ch ");
asm ("_DM2_usbReadProlog .set 80000c64h ");
asm ("_DM2_usbReadReg .set 80000c00h ");
asm ("_DM2_usbRegisterCallback .set 800009d0h ");
asm ("_DM2_usbRegisterClassrequestFunctab .set 80000a38h ");
asm ("_DM2_usbRegisterCtrltxhandler .set 800009e4h ");
asm ("_DM2_usbRegisterStandardrequestFunctab .set 80000a24h ");
asm ("_DM2_usbRegisterStringtab .set 800009f8h ");
asm ("_DM2_usbRegisterVendorrequestFunctab .set 80000a4ch ");
asm ("_DM2_usbReset .set 80000e00h ");
asm ("_DM2_usbSendZeroPacket .set 80000bcch ");
asm ("_DM2_usbSetEpconfig .set 800008d0h ");
asm ("_DM2_usbStallControl .set 800003fch ");
asm ("_DM2_usbWriteBlock .set 80000da0h ");
asm ("_DM2_usbWriteProlog .set 80000cb0h ");
asm ("_DM2_usbWriteReg .set 80000c34h ");
asm ("_DM2_watchdogEnable .set 80001c5ch ");
asm ("_DM2_watchdogTrigger .set 80001c74h ");
/***********************************************************************
BIOS global data addresses
***********************************************************************/
asm ("_DM2_usbSetupToken .set 80001f00h ");
#endif /* _DM2_DM642_ */