DSignT Support Database - User contributions [en]

XDS100v3 C6747/OMAP-L137 Connection Problem

2018-01-29T08:32:13Z

WikiImporter:

== Problem ==
CCSv5.x XDS100v3 C6747/OMAP-L137 Target Configuration Problems

Error Message:

IcePick_C_0: Error connecting to the target: (Error -501 @ 0x0) The
built-in scan-path length measurement failed. The built-in scan-path
reliability tests cannot be performed without knowledge of the scan-path
length. Try specifying the scan-path lengths in the command-line options or
board configuration file of this utility or debugger.

{{pagetop}}

== Solution ==
Open CCS Target Configuration, Advanced Tab, Connection Properties:

- change Converter Usage (default: 2-pin advanced) to 4-pin standard

- change Target Pin Width (default: 2 JTAG pins) to 4 JTAG pins

alternative:
change Converter Usage to "bypass, mimic XDS100v2"

{{pagetop}}
== Additional Tags ==
XDS100 IcePick

[[category:XDS100v3]]

XDS100v3 C6747/OMAP-L137 Connection Problem

2018-01-29T08:31:57Z

WikiImporter:

== Problem ==
CCSv5.x XDS100v3 C6747/OMAP-L137 Target Configuration Problems

test

Error Message:

IcePick_C_0: Error connecting to the target: (Error -501 @ 0x0) The
built-in scan-path length measurement failed. The built-in scan-path
reliability tests cannot be performed without knowledge of the scan-path
length. Try specifying the scan-path lengths in the command-line options or
board configuration file of this utility or debugger.

{{pagetop}}

== Solution ==
Open CCS Target Configuration, Advanced Tab, Connection Properties:

- change Converter Usage (default: 2-pin advanced) to 4-pin standard

- change Target Pin Width (default: 2 JTAG pins) to 4 JTAG pins

alternative:
change Converter Usage to "bypass, mimic XDS100v2"

{{pagetop}}
== Additional Tags ==
XDS100 IcePick

[[category:XDS100v3]]

Generate a Test Data Buffer

2015-12-08T13:23:50Z

WikiImporter: Pushed from DSignT Issue Database.

=== Generate a Buffer with Test Data ===

To debug and test signal processing algorithms it is recommended to use a test data set
instead of "real world" data acquired by an ADC.
The following code shows an example to generate a buffer filled with a sine wave.
The data is truncated to the desired resolution and optionally dithered.

==== Includes ====
<syntaxhighlight lang="c">
#include <stdint.h>
#include <math.h>
</syntaxhighlight>

==== Defines ====
The following defines control the signal generation.
<syntaxhighlight lang="c">
#define PI 3.1415926535898 /**< pi */
#define FS_IN 44100 /**< input sampling frequency in Hz */
#define RES_IN 16 /**< input resolution in bits */
#define SIG_IN 1000 /**< input signal frequency in Hz */
#define AMPL_IN 0.995 /**< input signal amplitude (0.0 - 1.0) */
#define PHASE_IN (PI/2) /**< input signal phase (-pi to pi) */

#define INBUF_SIZE 32768

#define DITHER_NONE 0 /**< no dither */
#define DITHER_RECT 1 /**< flat spectrum 1/2 LSB dither */
#define DITHER_TRIANGLE 2 /**< high-pass filtered triangular dither*/
#define DITHER_SHAPED 3 /**< Lipschitz minimal audible dither */

#define DITHER_TYPE (DITHER_SHAPED)
#define DITHERSCALE (1.0/((double)RAND_MAX - 0.5))
</syntaxhighlight>

==== Buffer ====
Depending on the selected resolution the generated test data set is stored
in an int8_t, int16_t or int32_t buffer. Data is always stored left justified,
i.e. if RES_IN was set to 12, data is stored in a 16-bit buffer with D[15]=MSB,
D[4] = LSB, and D[3:0] = 0
<syntaxhighlight lang="c">
#if RES_IN <= 8
int8_t acqbuf[INBUF_SIZE];
#elif RES_IN <= 16
int16_t acqbuf[INBUF_SIZE];
#else
int32_t acqbuf[INBUF_SIZE];
#endif
</syntaxhighlight>

==== Functions ====
===== quantisize() =====
This function quantisizes a normalized double float (range -1.0 to 1.0) to
the desired integer size and optionally performs dithering
<syntaxhighlight lang="c">
/*******************************************************************//**
@brief quantisize a normalized double (-1 to +1) to
N-bit integer and store in buffer

@param data - double data
@param bits - resolution in bits
@param buffer_addr - storage location

@return next buffer address

@note requires the following defines:
@note - DITHER_TYPE (DITHER_NONE, DITHER_RECT,
DITHER_TRIANGLE, or DITHER_SHAPED)

***********************************************************************/
uint32_t quantisize (double data, uint32_t bits, uint32_t buffer_addr)
{
/*******************************************************************
locals
*******************************************************************/
double scale;
uint32_t addr = buffer_addr;

#if DITHER_TYPE != DITHER_NONE
double r;
#endif

#if DITHER_TYPE == DITHER_TRIANGLE
static double dither_last = 0.0;
#endif

#if DITHER_TYPE == DITHER_SHAPED
/* Lipshitz's minimally audible FIR */
static double dither_coeff[5] = {2.033, -2.165, 1.959, -1.590, 0.6149};
static double dither_buffer[8] = {0.0, 0.0, 0.0, 0.0, 0.0, 0.0, 0.0, 0.0};
static uint32_t dither_phase = 0;
uint32_t idx;
double x;
#endif

/*******************************************************************
scale data
*******************************************************************/
scale = pow(2.0, (double)(bits-1)) - 2.0;
data = data * scale;

#if DITHER_TYPE == DITHER_NONE
/*******************************************************************
round to nearest integer
*******************************************************************/
data = floor (data + 0.5);
#endif

#if (DITHER_TYPE == DITHER_RECT)
/*******************************************************************
add dither and round to nearest integer
*******************************************************************/
r = (double)rand() * DITHERSCALE;
data = floor (data + r + 0.5);
#endif

#if (DITHER_TYPE == DITHER_TRIANGLE)
/*******************************************************************
add high-pass filtered dither and round to nearest integer
*******************************************************************/
r = (double)rand() * DITHERSCALE;
data = floor (data + r - dither_last + 0.5);
dither_last = r;
#endif

#if DITHER_TYPE == DITHER_SHAPED
/*******************************************************************
dither noise shaping in FIR filter
add noise shaped + triangular dither
store last error and roll buffer
*******************************************************************/
x = data;
for (idx = 0; idx < 5; idx++)
{
x = x + dither_buffer[(dither_phase - idx) & 7] * dither_coeff[idx];
}
r = (double)rand() * DITHERSCALE;
r += (double)rand() * DITHERSCALE;
data = x + r;

dither_phase++;
dither_phase &= 7;
data = floor (data + 0.5);
dither_buffer[dither_phase] = x - data;
#endif

/*******************************************************************
saturate
*******************************************************************/
if (data > scale) data = scale;
if (data < -scale) data = -scale;

/*******************************************************************
store in buffer
*******************************************************************/
if (bits <= 8)
{
*(int8_t *)addr = (int8_t)data << (8-bits);
addr += 1;
}
else if (bits <= 16)
{
*(int16_t *)addr = (int16_t)data << (16-bits);
addr +=2;
}
else
{
*(int32_t *)addr = (int32_t)data << (32-bits);
addr += 4;
}

/*******************************************************************
update address
*******************************************************************/
return addr;
}
</syntaxhighlight>

===== Sinewave Generator =====
generate a sinewave, calls quantisize
<syntaxhighlight lang="c">
/*******************************************************************//**
@brief generate a sinewave signal

@param fs - sampling frequency in Hz
@param fsig - signal frequency in Hz
@param asig - signal amplitude (0.0 to 1.0)
@param psig - signal phase (-pi to pi)
@param bits - signal resolution in bits
@param buffer - pointer to buffer memory
@param buffersize - size of buffer in samples

@note output array is left justified
@note calls quantisize()

***********************************************************************/
void sinegen ( uint32_t fs, double fsig, double asig, double psig, uint32_t bits, void* buffer, uint32_t buffersize)
{
/*******************************************************************
locals
*******************************************************************/
double arg;
double tmp;
uint32_t idx;
uint32_t addr = (uint32_t)buffer;

/*******************************************************************
calculate argument
*******************************************************************/
arg = 2.0 * PI * fsig / (double)fs;

/*******************************************************************
calculate sinewave
*******************************************************************/
for (idx = 0; idx < buffersize; idx++)
{
tmp = asig * sin (arg * (double)idx + psig);
addr = quantisize (tmp, bits, addr);
}
}
</syntaxhighlight>

===== Example =====
<syntaxhighlight lang="c">
/***********************************************************************

MAIN PROGRAM

***********************************************************************/
void main (void)
{
/*******************************************************************
generate acquisition sample buffer
*******************************************************************/
sinegen (FS_IN, SIG_IN, AMPL_IN, PHASE_IN, RES_IN, acqbuf, INBUF_SIZE);
}
</syntaxhighlight>

==== Dither Modes ====
The following spectrum plots show the effect of dithering:
[[File:16bit_no_dither.png]]
[[File:16bit_rectangular_dither.png]]
[[File:16bit_triangular_hp_dither.png]]
[[File:16bit_shaped_dither.png]]

{{pagetop}}

== Additional Tags ==
Sinewave Dither Noiseshaping

[[category:Software]][[category:DSP]]

File:16bit no dither.png

2015-12-08T13:23:49Z

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File:16bit rectangular dither.png

2015-12-08T13:23:48Z

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File:16bit shaped dither.png

2015-12-08T13:23:47Z

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File:16bit triangular hp dither.png

2015-12-08T13:23:46Z

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File:Arr u.png

2015-12-08T13:23:44Z

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Resize DDR3 section and add custom section in SYS/BIOS projects

2015-09-25T09:25:38Z

WikiImporter: Pushed from DSignT Issue Database.

To resize and relocate the default DDR3 RAM to base addres 0x80100000 and size 0xff00000 insert the following lines to your SYS/BIOS configuration file (e.g. app.cfg):
<syntaxhighlight lang="c">
// section to detect and change DDR3 RAM
var memmap = Program.cpu.memoryMap;
// Find DDR3 in memory map
for (var i=0; i < memmap.length; i++)
{
if (memmap[i].name == "DDR3")
{
memmap[i].base=0x80100000;
memmap[i].len= 0xff00000;
print("DDR3 base/length was changed");
}
}
//
</syntaxhighlight>

Create a new linker command file in your application directory (e.g. custom.cmd) and insert these lines:

<syntaxhighlight lang="c">
MEMORY
{
DDR3_MY (RWX) : org = 0x80000000, len = 0x100000
}
SECTIONS
{
.myddr3data > DDR3_MY
}
</syntaxhighlight>

The new data section .myddr3data can be used in your application by specifying the #pragma DATA_SECTION directive:

<syntaxhighlight lang="c">
#pragma DATA_SECTION (my_ddr3_data, ".myddr3data");
volatile uint8_t my_ddr3_data[0x100000];
</syntaxhighlight>

Verify the correct location by viewing your generated map file:

[[file:customddrsection.jpg|sysbios_DM2C6657.map]]

{{pagetop}}
== Additional Tags ==

[[category:D.Module2.C6657]]

File:Customddrsection.jpg

2015-09-25T09:25:37Z

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File:Arr u.png

2015-09-25T09:25:35Z

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Create new SYS/BIOS project for D.Module2.C6657

2015-09-25T09:21:54Z

WikiImporter: Pushed from DSignT Issue Database.

== Problem ==
SYS/BIOS based projects require the correct platform setting for D.Module2.C6657. Even after adding the discovery path under CCS RTSC preferences no suitable platform is available for project settings.

== Solution ==
Use this short guide to create a new SYS/BIOS based project:

=== Pre Condition ===
Check your required SYS/BIOS version and choose the recommended XDCTools version:

http://downloads.ti.com/dsps/dsps_public_sw/sdo_sb/targetcontent/rtsc/

=== New Project ===
Press Alt+Shift+N or menu File->New and select New CCS Project

[[File:new_project_dialog.jpg|thumb|500px]]
 Choose target "TMS320C6657" or "Generic C66xx Device".

 Enter a project name. Since projects in the Eclipse workspace must be unique, it is recommended to append the module name to the project name to prevent later naming conflicts with other module types. Browse for your project location (typically under \D.SignT\Boards\DM2C6657\Projects\).

 As project template select "Empty RTCS Project" and press Next.

{{Absatz}}

{{pagetop}}

=== RTSC Configuration Settings ===
[[File:RTCS_Configuration_settings.jpg|thumb|500px]]
Check the Platform drop-down list for keyword 'dm2c6657'. If it is missing continue with the next step, else jump to [[#Platform dm2c6657 or dm2c6657_1|2.6 Platform dm2c6657 or dm2c6657_1]]
{{Absatz}}

{{pagetop}}

=== Add Product or Repository ===
Choose "Add" next to "Products and Repository".

[[File:add_product_or_repository.jpg|thumb|500px]]
 In the newly opened dialog activate "Select repository from file-system" and browse for the D.Module2.C6657 RTSC directory (typically under \D.SignT\Boards\DM2C6657\BoardSupport\).

 Press OK
{{Absatz}}

{{pagetop}}

=== Other Repositories ===
The RTSC Configuration Settings dialog should contain a new product "Other Repositories".
[[File:other_repositories.jpg|thumb|500px]]
 Activate the DM2C6657 entry (if not yet activated) and try again to select a platform
{{Absatz}}

{{pagetop}}

=== Platform dm2c6657 or dm2c6657_1 ===
[[File:platform_dm2c6657.jpg|thumb|500px]]
This time two new platforms should appear in the drop-down list (if not try to refresh the list by clicking on the XDCTools version - 3.31.0.24_core in the image)

 <pre style="color:red">dm2c6657</pre> for CPU core 0 and <pre style="color:red">dm2c6657_1</pre> for CPU core 1.
{{Absatz}}
[[File:finish_new_project.jpg|thumb|500px]]
 Select the desired platform and finish the create new project process

{{Absatz}}

{{pagetop}}

=== Empty Project ===
[[File:empty_project.jpg|thumb|500px]]
You should now have an empty SYS/BIOS project.

{{Absatz}}

{{pagetop}}
=== Add SYS/BIOS configuration ===
[[File:8.new_configuration_file.jpg|thumb|500px]]
To add a blank SYS/BIOS configuration to your empty project, choose from menu "File->New->RTSC Configuration File"
{{Absatz}}

[[File:9.new_configuration_file2.jpg|thumb|500px]]
 Enter a file name and press "Finish"
{{Absatz}}

[[File:10.add_sysbios_support.jpg|thumb|500px]]
Double click on the SYS/BIOS configuration file.

Activate "Add SYS/BIOS to my configuration"
{{Absatz}}

{{pagetop}}

=== Add Source Code ===
[[File:11.add_source_code.jpg|thumb|500px]]
Now add some source code:
{{Absatz}}

[[File:12.add_source_code2.jpg|thumb|500px]]
Choose the RTSC 'Hello World' main template and finish
{{Absatz}}

{{pagetop}}

=== Finally build project ===
Hit the hammer butten to initiate a new build process.

[[File:13.finish_creating_project.jpg]]

{{pagetop}}

== Additional Tags ==
[http://downloads.ti.com/dsps/dsps_public_sw/sdo_sb/targetcontent/rtsc XDCTools Product Releases]
 [http://processors.wiki.ti.com/index.php/SYS/BIOS_CCS6_Migration_Guide SYS/BIOS CCS6 Migration Guide]

[[category:CCS6 Usage]]

[[category:D.Module2.C6657]]

File:10.add sysbios support.jpg

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File:11.add source code.jpg

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File:12.add source code2.jpg

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File:13.finish creating project.jpg

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File:8.new configuration file.jpg

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File:9.new configuration file2.jpg

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File:Add product or repository.jpg

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File:Empty project.jpg

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File:Finish new project.jpg

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File:New project dialog.jpg

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File:Other repositories.jpg

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File:Platform dm2c6657.jpg

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File:RTCS Configuration settings.jpg

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File:Arr u.png

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Category:CCS6 License

2015-08-13T12:44:53Z

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== CCS6 License ==
http://processors.wiki.ti.com/index.php/Licensing_-_CCSv6

http://processors.wiki.ti.com/index.php/Activating_CCSv6

[[category:CCS6]]

Category:CCS4 License

2015-08-13T12:44:42Z

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== CCS4 License ==
http://processors.wiki.ti.com/index.php/Licensing_-_CCS

http://processors.wiki.ti.com/index.php/Activating_CCSv4

[[category:CCS4]]

Category:CCS4 Updates

2015-08-13T12:42:12Z

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== CCS4 Updates ==
http://processors.wiki.ti.com/index.php/Updating_CCSv4

[[category:CCS4]]

Category:CCS4 Install

2015-08-13T12:40:17Z

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== CCS4 Install ==
http://processors.wiki.ti.com/index.php/Compiler_Installation_and_Selection

[[Category:CCS4]]

Category:CCS5

2015-08-13T12:35:08Z

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== Code Composer Studio 5 related problems ==
http://processors.wiki.ti.com/index.php/Category:Code_Composer_Studio_v5

*[[:Category:CCS5 Install|Installation]]
*[[:Category:CCS5 Usage|Usage]]
*[[:Category:CCS5 Updates|Updates]]
*[[:Category:CCS5 License|License]]

[[category:Code Generation Tools]]

Category:CCS5 License

2015-08-13T12:33:14Z

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== CCS5 License ==
http://processors.wiki.ti.com/index.php/Licensing_-_CCS

http://processors.wiki.ti.com/index.php/Activating_CCSv5

[[category:CCS5]]

Category:CCS5 Updates

2015-08-13T12:29:18Z

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== CCS5 Updates ==
http://processors.wiki.ti.com/index.php/Updating_CCSv5

[[category:CCS5]]

Category:CCS5 Install

2015-08-13T12:23:33Z

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== CCS5 Install ==
http://processors.wiki.ti.com/index.php/Compiler_Installation_and_Selection

[[category:CCS5]]

Category:CCS6 License

2015-08-13T12:20:01Z

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== CCS6 Updates ==
http://processors.wiki.ti.com/index.php/Licensing_-_CCSv6

http://processors.wiki.ti.com/index.php/Activating_CCSv6

[[category:CCS6]]

Category:CCS6 Install

2015-08-13T12:18:21Z

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== CCS6 Install ==
http://processors.wiki.ti.com/index.php/Compiler_Installation_and_Selection

[[category:CCS6]]

Category:CCS6 License

2015-08-13T12:15:39Z

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== CCS6 Updates ==
http://processors.wiki.ti.com/index.php/Licensing_-_CCSv6

[[category:CCS6]]

Category:CCS6 Updates

2015-08-13T12:15:18Z

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== CCS6 Updates ==
http://processors.wiki.ti.com/index.php/Updating_CCSv6

[[category:CCS6]]

Category:CCS6

2015-08-13T12:14:12Z

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== Code Composer Studio 6 related problems ==

http://processors.wiki.ti.com/index.php/Category:Code_Composer_Studio_v6

*[[:Category:CCS6 Install|Installation]]
*[[:Category:CCS6 Usage|Usage]]
*[[:Category:CCS6 Updates|Updates]]
*[[:Category:CCS6 License|License]]

[[category:Code Generation Tools]]

Re-assign virtual COM port

2015-05-22T07:21:10Z

WikiImporter: Pushed from DSignT Issue Database.

== Problem ==
Any time the D.Module2.C6657 is powered on while the USB connection to the PC is used a new virtual COM port is assigned on Windows.

== Solution ==
Re-assign virtual COM port. Follow these instructions:

 
Open "Control Panel - System and Security - System":

[[File:system.png|600px]]

Click on Device Manager.
{{pagetop}}
 
Expand the COM port list and try to identify the COM port your D.Module2 is enumerted to

[[File:device_manager_2.png|600px]]

 
Right click on the specific COM port and select Properties

[[File:device_manager_right_click.png|600px]]

 
Select "Change settings"

[[File:change_settings.png|400px]]

 
Change to "Port Settings" tab and click on "Advanced..."

[[File:advanced.png|400px]]

 
In the following window choose a suitable COM port (in this case COM3)

[[File:select.png|600px]]

Accept all windows with "Ok"

{{pagetop}}

[[category:D.Module2.C6657]]

File:Advanced.png

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File:Change settings.png

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File:Device manager 2.png

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File:Device manager right click.png

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File:Select.png

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File:System.png

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File:Arr u.png

2015-05-22T07:20:56Z

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Re-assign virtual COM port

2015-05-22T07:06:32Z

WikiImporter: Pushed from DSignT Issue Database.

== Problem ==
Any time the D.Module2.C6657 is powered on while the USB connction to the PC is used a new virtual COM port is assigned on Windows.

{{pagetop}}
== Solution ==
Re-assign virtual COM port. Follow these instructions:

 
Open "Control Panel - System and Security - System":

[[File:system.png|600px]]

Click on Device Manager.
{{pagetop}}
 
Expand the COM port list and try to identify the COM port your D.Module2 is enumerted to

[[File:device_manager_2.png|600px]]

 
Right click on the specific COM port and select Properties

[[File:device_manager_right_click.png|600px]]

 
Select "Change settings"

[[File:change_settings.png|400px]]

 
Change to "Port Settings" tab and click on "Advanced..."

[[File:advanced.png|400px]]

 
In the following window choose a suitable COM port (in this case COM3)

[[File:select.png|600px]]

Accept all windows with "Ok"

{{pagetop}}

[[category:D.Module2.C6657]]

File:Advanced.png

2015-05-22T07:06:30Z

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File:Change settings.png

2015-05-22T07:06:28Z

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