D.Module2.C6747

The D.Module2.C6747 is based on the Texas Instruments processor TMS320C6747. It is characterized by low power requirements and a broad range of data acquisition and communication interfaces.

Applications

The D.Module2.C6657 is a perfect choice for industrial control and measurement. The large number of serial McASP channels for example facilitates building multi-channel, high resolution, synchronously sampled data acquisition systems, as used in vibration monitoring and analysis. A host PC can be connected via USB or Ethernet.

Specifications
DSP TMS320C6747 300, 375, or 456 MHz floating-point DSP, 2400, 3000, or 3648 MMACS
Memory DSP-internal 32K bytes data cache, 32K bytes program cache, 256K bytes direct mapped or level-2 cache, 128K bytes shared RAM
  SDRAM 64M bytes, 133 MHz operation, 32-bit wide, 512M bytes/s peak throughput
  Flash 8M bytes NOR with SPI interface, sector architecture, optional NAND Flash, SD/Multi-Media-Card Interface
Ethernet 100Base-Tx, 10Base-T onboard PHY and magnetics with integrated 2-port switch, 100Base-Fx Fiber support with external transceiver
USB 2 USB2.0 OTG (480 Mbit/s) and USB1.1 Host (12 MBit/s)
UART 2 transmit and receive Fifo, DMA support, Port 1: RS232: max 460,8K baud, automatic hardware flow-control, Port 2: RS422/485: max. 3M baud
SPI 1 max. 50 Mbps, master and slave mode
I2C 1 max. 400 kbps, 7 and 10 bit addressing modes, master and slave mode
McASP 2 independent receivers and transmitters, max. 50 Mbps throughput
Timer 3 2 x 32/64-bit, 1 x 16-bit high speed timer with 10ns resolution
GPIO 16 bit-wise programmable, input or output
External Bus Interface EMIF asynchronous transfers, 16/32-bit data bus, 14 address lines, 2 pre-decoded chip selects, configurable timing
Real-Time Clock 1 provision for external buffer power supply
Quadrature Decoder 2 quadrature and direction/count mode,
Index and Strobe inputs, 32 bit counter registers
PWM 3 16-Bit Time-Base Counter, 6 Single Edge, 6 Dual Edge Symmetric or 3 Dual Edge Asymmetric Outputs, Dead-Band, PWM Chopping, Trip Zone
Capture Timer 3 up to 4 events per channel, also configurable as auxillary PWM
System Supervisor   voltage and watchdog
Emulation Interface   JTAG
I/O Level LVTTL / LVCMOS all signals except ETH and USB: high level min. 2V, max. 3.5V, low level min. -0.2V, max. 0.8V, output drive: external bus interface:± 12 mA, all others ± 4 mA
Power Supply 3.3V single supply, 750mA typ.
Firmware D.Module2.BIOS bootloader, board initialization, board configuration, flash memory programming, UART and USB I/O
  Setup Utility program and data file uploads to the flash memory via USB or UART
  Config File user- configurable text file with program and initialization parameters
Temperature Range   0 – 70°C
Connectors BUS1, BUS2, COM, EXP Molex 71436-2164
  JTAG 14-pin, 2.54mm pitch
Mechanics   86.8 x 58.4 mm, overall height: 16mm
ROHS   compliant

Note: pin multiplexing on the TMS320C6747 DSP imposes some restrictions on the simultaneous use of peripherals. Please refer to the D.Module2.C6747 data sheet for detailled information.

Ordering Information
D.Module2.C6747 standard module
DK.C6747 C6747 development kit including D.Module2.C6747, XDS100 JTAG in-circuit emulator, D.Base1 base board, power supply, RS232 and USB cable, support software, user's guide, and free support via Email or phone
DK.C6747-FMC C6747 and FPGA development kit including D.Module2.C6747, D.Module2.6SLX45T, XDS100 JTAG in-circuit emulator, D2.Base-FMC base board, power supply, USB cable, DSP support software, FPGA interface examples in VHDL, user's guides, and free support via Email or phone
DS.TCP/IP-C6747 Ethernet software development kit including libraries, sample programs, documentation, and evaluation license for the D.SignT TCP/IP stack
Compatibility

The D.Module2.C6747 may be used as an alternative to other members of the Texas Instruments C674x processor family. The following resource compares the D.Module2.C6747 features with other processors.

C674x_Low_Power_DSP

Peripheral Daughter Cards
Development Tools