View source for Linking C6400 Code With C6200/C6700/OlderC6400 Object Code

Taken from document SPRU187o.pdf by Texas Instruments: Using the C/C++ Compiler

----


In order to facilitate certain packed-data optimizations, the alignment of top-level arrays for the C6400 family was changed from 4 bytes to 8 bytes.(For C6200 and C6700 code, the alignment for top-level arrays is always 4 bytes.)
If you are linking C6400/C6400+/C6740 with C6200/6700 code or older C6400 code, you may need to take steps to ensure compatibility. The following lists the potential alignment conflicts and possible solutions.


'''Potential alignment conflicts occur when:'''
* Linking new C6400/C6400+/C6740 code with any C6400 code already compiled with the 4.0 tools.
* Linking new C6400/C6400+/C6740 code with code already compiled with any version of the tools for the C6200 or C6700 family.


'''Solutions (pickone):'''
* Recompile the entire application with the --silicon_version=6400 switch. This solution, if possible, is recommended because it can lead to better performance.
* Compile the new code with the --target_compatibility_6200 option. The --target_compatibility_6200 option changes the alignment of top-level arrays to 4 bytes when the --silicon_version=6400 or --silicon_version=6400+ optionis used.


{{pagetop}}
== Additional Tags ==
SPRU425a.pdf TMS320C6000 Optimizing C Compiler Tutorial

 [[category:Software]]